devel.rst
changeset 2228 837f1337c59b
parent 1912 8b81a8f0f692
--- a/devel.rst	Sat Feb 10 01:28:53 2018 +0200
+++ b/devel.rst	Sat Feb 10 01:30:24 2018 +0200
@@ -9,17 +9,17 @@
 Numbers everyone should know
 ============================
 
- * L1 cache reference 0.5 ns
- * Branch mispredict 5 ns
- * L2 cache reference 7 ns
- * Mutex lock/unlock 100 ns
- * Main memory reference 100 ns
- * Compress 1K bytes with Zippy 10,000 ns
- * Send 2K bytes over 1 Gbps network 20,000 ns
- * Read 1 MB sequentially from memory 250,000 ns
- * Round trip within same datacenter 500,000 ns
- * Disk seek 10,000,000 ns
- * Read 1 MB sequentially from network 10,000,000 ns
- * Read 1 MB sequentially from disk 30,000,000 ns
- * Send packet CA->Netherlands->CA 150,000,000 ns
+* L1 cache reference 0.5 ns
+* Branch mispredict 5 ns
+* L2 cache reference 7 ns
+* Mutex lock/unlock 100 ns
+* Main memory reference 100 ns
+* Compress 1K bytes with Zippy 10,000 ns
+* Send 2K bytes over 1 Gbps network 20,000 ns
+* Read 1 MB sequentially from memory 250,000 ns
+* Round trip within same datacenter 500,000 ns
+* Disk seek 10,000,000 ns
+* Read 1 MB sequentially from network 10,000,000 ns
+* Read 1 MB sequentially from disk 30,000,000 ns
+* Send packet CA->Netherlands->CA 150,000,000 ns